Intel's return to the independent GPU is a big event that the entire industry is expecting, and the official has long said that it will take the lead in introducing the Intel 7nm process.
At the 2019 Supercomputing Conference, Intel demonstrated this new category of independent general-purpose GPUs with high performance and high flexibility. The research and development codename is "Ponte Vecchio", which is designed for HPC high-performance computing modeling, simulation workloads, AI artificial intelligence training and design.
According to reports, Ponte Vecchio will be manufactured using Intel's 7nm process and will be Intel's first GPU based on the Xe architecture. It will also use Intel Foveros 3D and EMIB (embedded multi-chip interconnection bridge) packaging technologies.
At the same time, it will integrate a number of advanced technologies, such as HBM high-bandwidth memory, CXL high-speed interconnection protocol, and other patented technologies.
The specific release time of Ponte Vecchio has not been disclosed, but Intel has said before that it will release the first new discrete graphics card in 2020 and switch to the 7nm process in 2021, which should be it.
Intel also announced that the Aurora tens of billions of secondary supercomputers of the Argonne National Laboratory under the US Department of Energy will use Intel Xeon Scalable processors, Xe GPU graphics cards, Optane data center-level persistent memory, other Connectivity technology will become the first tens of billions of secondary computing systems in the United States that fully utilize Intel ’s data-centric technology product portfolio.
Each computing node of "Aurora" includes two Intel 10nm Xeon Scalable processors (code-named Sapphire Rapids), six Ponte Vecchio GPUs, overall support for more than 10PB memory, more than 230PB storage capacity, and can be connected to 200 through Cray Slingshot technology. Multiple rack nodes.
Intel emphasizes that Intel Xeon supports more than 90% of the world's top 500 supercomputers, and the Xeon Scalable processor is also the only x86 processor with built-in artificial intelligence acceleration, and is targeted at high-performance computing workloads. The analysis of a large number of data sets has been optimized.
Explanation of related terms:
EMIB:
A 2D interconnect packaging technology, the typical representative is the Intel Kaby Lake-G processor, which is equivalent to adding an AMD Vega GPU inside the eighth-generation Core. It communicates with the CPU through EMIB.
Foveros:
The 3D three-dimensional stacked packaging technology proposed by Intel earlier this year can flexibly stack multiple modules with different processes and different IPs in a chip. The typical representative is the Lakefiled processor, which integrates the calculation die of the 10nm process and the basic die of the 14nm process. Both bare chips, Microsoft's dual-screen Surface Neo and Samsung Galaxy Book S notebooks will adopt it.
CXL:
It is an open high-speed interconnection technology proposed by Intel and serves the next generation of high-performance computing and data centers. The bottom layer is based on PCIe, which can eliminate the transmission bottleneck of computing-intensive workloads between the CPU and the device, and the CPU and storage. Improve performance.
The CXL alliance has been formally established at the end of September this year. The core members include Alibaba, Cisco, Dell EMC, Facebook, Google, HPE, Huawei, Intel, Microsoft, etc. IBM, Xilinx, AMD, ARM are all member.
Sapphire Rapids:
There is not much information currently known, and the basic judgment is that the second-generation Xeon platform after 10nm Ice Lake, corresponding to the consumer-grade Tiger Lake, is expected to be released later next year or early the following year.
